Performance of Class D switching amplifiers is susceptible to degradations from power supply variations and switching non-idealities. Power supply variations constitute a significant source of error since at full scale modulation the power supply rejection (PSR) is essentially 0 dB. While analog feedback techniques have been successfully employed with analog PWM (pulse width modulation) amplifiers to mitigate these degradations, applying feedback to digital PWM amplifiers is problematic because of incompatible domains and processing latencies.
One prior approach for mitigating these degradations employs open loop digital pre-compensation as depicted in FIG. 1A (Prior Art). The switching amplifier embodiment 100 receives digital PCM (pulse code modulated) signals and processes them with volume (VOL) control block 102. The output of the volume (VOL) control block 102 is provided to the PWM (pulse width modulated) controller 104. PWM controller (PWM) 104 outputs PWM signals to driver 106. The driver 106 provides the PWM output signals (PWMOUT) for the Class D switching amplifier. To help adjust for errors in the PWM output signals (PWMOUT) due to voltage supply variations, this prior solution feeds the supply voltage (Vp) for the driver 106 to an analog-to-digital converter (ADC) 108 and then to filter 110 to provide a feedback signal to the volume (VOL) control block. The gain applied by the volume (VOL) control block 102 to the incoming PCM signals is then adjusted based upon the feedback signal received from the filter 110. This prior approach, therefore, attempts to compensate for amplitude errors in the output signals caused by variations in the voltage supply (Vp) through voltage supply (Vp) feedback signals that adjust the amplitude of the incoming PCM signals.
Another prior approach employs closed loop feedback of the PWM pulse area as depicted in FIG. 1B (Prior Art). The switching amplifier embodiment 150 includes a PWM controller (PWM) 104 that receives the PCM signals and outputs PWM signals to a pulse edge error correction (PEDEC) block 152. The output signals from PEDEC block 152, which are edge corrected PWM signals, are provided to driver 106. The driver 106 provides the PWM output signals (PWMOUT) for the Class D switching amplifier. To help adjust for errors in PWM output signals (PWMOUT), this prior solution sends the PWM output signal (PWMOUT) as a feedback signal to an error processing block 154. The error processing block 154 also receives the PWM input signals from PWM controller 104 as reference signals. The error processing block 154 then outputs edge error correction signals to the PEDEC block 152. The PEDEC block 152 uses these edge error correction signals to adjust the edges of the PWM input signals so that the PWM output signals 156 from the PEDEC block 152 are edge corrected PWM signals. This prior approach attempts to compensate for PWM pulse area errors in the output signals by comparing the pulse area of the PWM output signal with that of the PWM input signal and then adjusting the edges of the PWM signals to compensate for the area differences.
While these approaches have been employed to mitigate non-ideal effects of digital PWM amplifiers, solutions are lacking that improve the intrinsic power supply rejection, distortion, and damping performance of open loop switching amplifiers.